Display panels, such as liquid crystal display (LCD) panels have been employed for displaying images, such as those created by computers. Such an LCD panel is arranged in pixel elements configured in a matrix of columns and rows. When the information indicative of a display image is scanned across the LCD panel to create an image frame, each row of pixel elements are activated selectively by an image information signal.
In order to synchronize the image information signal with the individual pixel elements, a horizontal synchronization (HSYNC) signal is generated for each row of the matrix of pixel elements. Furthermore, a pixel or dot clock (DCLK) signal is derived from the HSYNC signal and has an individual clock signal for each pixel element in each row.
If the DCLK signal is not properly and precisely synchronized with the image information signal, a distorted or noisy image results. In this regard, if there are too many or too few individual clock pulses generated for a given row of pixel elements, unwanted and undesirable vertical stripes appear on the image. Generally, there would be one stripe for each additional or missing clock pulse. Additionally, if the synchronization of the DCLK signal phase with the image information signal phase is not precisely accomplished, the image is also distorted.
Thus, the number of individual clock pulses must be adjusted, and the phase of the DCLK signal must be synchronized with the phase of the image information signal, to precisely stabilize the resulting image. In order to accomplish this, a phase locked loop circuit has been employed to precisely adjust the number of clock pulses for each row of pixel elements. The phase locked loop circuit was adjusted by the user to adjust the number of pulses corresponding to the pixel elements of a given row. Additionally, a delay circuit was employed to adjust the synchronization of the phases. The user was then required to adjust the delay for the delay circuit to adjust the synchronization.
By adjusting the phase locked loop circuit, the noise stripes can be eliminated. However, since the phase must also be adjusted by the user at the same time, it frequently is difficult for the user to accomplish both adjustments simultaneously to give the optimum stabilization of the image. For example, it can happen that a user can reduce the number of noise stripes onto a single one and then attempt to adjust the phase. Since there are not the correct number of clock pulses being generated, the adjustment to the phase cannot be entirely effective to optimize the stabilization of the image.
Generally, the phase locked loop was passively preset for operation in a particular environment to help display a stabilized image. Factors, such as cable impedance or differing signal paths, can adversely affect the synchronization of the system. Thus, the complicated and confusing adjustment had to be repeated, thereby frustrating the user.
The stabilization of a displayed image could, thus, prove to be extremely difficult for users unaccustomed to adjusting the operation of a phase locked loop. Without a technical understanding of the adjustments required to stabilize an image, a user was liable to make adjustments which would prevent the image from becoming stabilized. As a result, the user could become frustrated and settle for a less than ideal displayed image, thereby reducing the effectiveness of the image.
Therefore, it would be highly desirable to greatly simplify the image stabilization adjustments by a user. In this regard, the adjustment technique should be convenient to use and result in an optimum stabilization.